DK-DEV-5SGXEA7N【PDF 189/527 页】KIT DEV STRATIX V FPGA 5SGXEA7

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SV51007

2014.01.10

Assigning Input Delay to LVDS Receiver Using TimeQuest Timing Analyzer

6-33

? If you do not set any input delay in the TimeQuest Timing Analyzer, the receiver channel-to-channel

skew defaults to zero.

? You can also directly set the input delay in a Synopsys Design Constraint file ( .sdc ) using the

set_input_delay command.

Example 6-1: RSKM Calculation Example

This example shows the RSKM calculation for Stratix V devices at 1 Gbps data rate with a 200 ps

board channel-to-channel skew.

?

?

?

?

?

TCCS = 100 ps (pending characterization)

SW = 300 ps (pending characterizatoin

TUI = 1000 ps

Total RCCS = TCCS + Board channel-to-channel skew = 100 ps + 200 ps = 300 ps

RSKM = (TUI – SW – RCCS) / 2 = (1000 ps – 300 ps – 300 ps) / 2 = 200 ps

Because the RSKM is greater than 0 ps, the receiver non-DPA mode will work correctly.

Related Information

? LVDS SERDES Transmitter/Receiver (ALTLVDS_TX and ALTLVDS_RX) Megafunction User Guide

Provides more information about the RSKM equation and calculation.

? Quartus II TimeQuest Timing Analyzer chapter, Quartus II Development Software Handbook

Provides more information about .sdc commands and the TimeQuest Timing Analyzer.

Assigning Input Delay to LVDS Receiver Using TimeQuest Timing Analyzer

To obtain the RSKM value, assign an appropriate input delay to the LVDS receiver from the TimeQuest

Timing Analyzer constraints menu.

1. On the menu in the TimeQuest Timing Analyzer, select Constraints > Set Input Delay .

2. In the Set Input Delay window, select the desired clock using the pull-down menu. The clock name must

reference the source synchronous clock that feeds the LVDS receiver.

3. Click the Browse button (next to the Targets field).

4. In the Name Finder window, click List to view a list of all available ports. Select the LVDS receiver serial

input ports according to the input delay you set, and click OK .

5. In the Set Input Delay window, set the appropriate values in the Input delay options and Delay value

fields.

6. Click Run to incorporate these values in the TimeQuest Timing Analyzer.

7. Repeat from step 1 to assign the appropriate delay for all the LVDS receiver input ports. If you have

already assigned Input Delay and you need to add more delay to that input port, turn on the Add Delay

option.

High-Speed Differential I/O Interfaces and DPA in Stratix V Devices

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